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Today, with the ever-increasing use of mobile devices, power consumption besides cost and performance has become an important parameter in the design of digital systems. Approximate computational blocks, with acceptable accuracy, have a positive impact on all three criteria of cost, power, and performance; approximate or inaccurate calculations has been accepted more than ever as a new approach to the design of digital systems. In this paper, an approximate adder is designed and the error rate is evaluated. Then, by using this adder, an approximate multiplier is also proposed. This multiplier is used in smoothing and sharpening application in the image processing applications. Using these computing blocks has led to saving 63% of dynamic power consumption, 70% static power saving, 25% decrease in design area and 33% improvement in latency. Also, the amount of error of system due to the use of approximate calculations is on average 33%, which does not have a negative effect on the function of the application in smoothing and sharpening.

Keywords: Approximate computing, Approximate full adder, Approximate multiplier, Power consumption, Image Processing

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