1. [1] Wang, Y.A.O., Yao, M., Guo, B., "A low-power high-speed dynamic comparator with a trans conductance-enhanced latching stage", IEEE Access, Vol. 7, pp. 93396-93403, 2019. [
DOI:10.1109/ACCESS.2019.2927514]
2. [2] Bahramali, A., Lopez-Vallejo, M., "A low power RFID based energy harvesting temperature resilient CMOS-only reference voltage", Integrate. VLSI J. Vol. 67, pp. 155-161, 2019. [
DOI:10.1016/j.vlsi.2019.01.014]
3. [3] Rastegar, H., Zare, S., Ryu, J., "A low-voltage low-power capacitive-feedback voltage controlled oscillator", Integrate. VLSI J. Vol. 60, pp. 257-262, 2018. [
DOI:10.1016/j.vlsi.2017.10.008]
4. [4] Salehi, N., Bekrani, M., Zayyani, H., Taskhiri, M. M., "A Fully Differential Ultra Wideband Common-Gate Low Noise Amplifier", Electronics Industries, Vol. 10, No. 3, pp. 43-58, 2019.
5. [5] Bekrani, M., Hamiyati-Vaghef, V., "An Improved Ultrasonic Imaging Method for Weld Inspection", Journal of Iranian Association of Electrical and Electronics Engineers, Vol. 17, No. 1, pp. 45-59, 2020.
6. [6] Amraee, M., Farshidi, E., Kosarian, A., "Design of Power-Efficient Adiabatic Charging Circuit in 0.18μm CMOS Technology", Journal of Iranian Association of Electrical and Electronics Engineers, Vol. 20, No. 1, pp. 119-127, 2023. [
DOI:10.52547/jiaeee.20.1.119]
7. [7] Ashok, D., Vidhate, S., "Low Power High Performance Current Mirror - A Review", Journal of Physics: Conference Series 1804, 2021. [
DOI:10.1088/1742-6596/1804/1/012161]
8. [8] Bchir, M., Aloui, I., Hassen, N., "A bulk-driven quasi-floating gate FVF current mirror for low voltage, low power applications", Integrat. VLSI J., Vol. 74, pp. 45-54, 2020. [
DOI:10.1016/j.vlsi.2020.04.002]
9. [9] Chang, M., Wu, C., Kuo, C., Shen, S., "A low-voltage bulk- drain-driven read scheme forsub-0.5 V 4 Mb 65 nm logic-process compatible embedded resistive RAM (ReRAM) macro", IEEE J. Solid State Circ., Vol. 48, pp. 2250-2259, 2013. [
DOI:10.1109/JSSC.2013.2259713]
10. [10] Ziegler, M., Günther, R., Kohlstedt, H., "Complementary floating gate transistors with memristive operation mode", IEEE Electron. Device Lett., Vol. 37, pp. 186-189, 2016. [
DOI:10.1109/LED.2015.2511799]
11. [11] Sharma, S., Rajput, S. S., Mangotra, L. K., Jamuar, S. S., "FGMOS current mirror: behavior and bandwidth enhancement", Analog Integrate. Circuits Signal Process., Vol. 46, pp. 281-286, 2006. [
DOI:10.1007/s10470-006-1625-6]
12. [12] Angulo, J., Martín, A., Carvajal, R., Chavero, F., "Very low-voltage analog signal processing based on quasi-floating gate transistors", IEEE J. Solid State Circ., Vol. 39, pp. 434-442, 2004. [
DOI:10.1109/JSSC.2003.822782]
13. [13] Khateb, F., "Bulk-driven floating-gate and bulk-driven quasi-floating-gate techniques for low-voltage low-power analog circuits design", AEU. Int. J. Electron. Commun., Vol. 68, pp. 64-72, 2014. [
DOI:10.1016/j.aeue.2013.08.019]
14. [14] Khateb, F., Khatib, N., "Connection of FG MOS and QFG MOS transistors for analogous integrated circuits". National patent application, Industrial Property Office in the Czech Republic, registration number: 303698, 2013.
15. [15] Khateb, F., "The experimental results of the bulk-driven quasi-floating-gate MOS transistor", Int. J. Electron. Commun., Vol. 69, pp. 462-466, 2015. [
DOI:10.1016/j.aeue.2014.10.016]
16. [16] امین زاده حامد، مدارهای مجتمع خطی CMOS از طراحی تا پیادهسازی، مشهد، انتشارات خط اول، 1397.
17. [17] Kumar, A. P., Tamil, S., Raj, N., "Design of Low Voltage Quasi Floating Self Cascode Current Mirror", U. Porto Journal of Engineering, Vol. 7, No. 4, pp. 33-45, 2021. [
DOI:10.24840/2183-6493_007.004_0003]
18. [18] Gupta, R., Sharma, S., "Quasi-floating gate MOSFET based low voltage current mirror", Microelectronics Journal, Vol. 43, No. 7, pp. 439-443, 2012. [
DOI:10.1016/j.mejo.2012.04.006]
19. [19] Ren, L., Zhu, Z., Yang, Y., "Design of ultra-low voltage op amp based on quasi-floating gate transistors". In Proc. 7th IEEE international conference on solid-state and integrated circuits technology, Beijing, China, pp. 1465-1468, 2004.
20. [20] Jamb, M., "Ultra low power current mirror design with enhanced bandwidth", Microelectronics Journal, Vol. 113, 105063, 2021. [
DOI:10.1016/j.mejo.2021.105063]
21. [21] Monfaredi, K. H., Faraji-Baghtash, H., "An Extremely Low-Voltage and High- Compliance Current Mirror", Circuits, Systems, and Signal Processing, Vol. 39, pp. 30-53, 2020. [
DOI:10.1007/s00034-019-01175-1]
22. [22] Raj, N., Singh, A. K., Kumar Gupta, A., "Low voltage high performance bulk driven quasi-floating gate based self-biased cascade current mirror" Microelectronics Journal, Vol. 52, pp. 124-133, 2016. [
DOI:10.1016/j.mejo.2016.04.001]
23. [23] Mishra, A., Gupta, M., "QFGMOS Based Current Mirror with High Bandwidth and Low Input Impedance", International Conference on Computing, Power and Communication Technologies (GUCON), pp. 161-164, 2019.
24. [24] Chaudhary, A., "A Low Power DTMOS Based Modified Current Mirror for Improved Bandwidth Using Resistive Compensation Technique", 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT), pp. 1-5, 2018. [
DOI:10.1109/ICCCNT.2018.8494119] [
]
25. [25] Mishra, M., Bhat, M. V., Pai, P. K., Kamath, D. V., "Implementation of Low Voltage Floating Gate MOSFET based Current Mirror Circuits using 180nm technology", Third International Conference on Inventive Systems and Control (ICISC), pp. 268-272, 2019. [
DOI:10.1109/ICISC44355.2019.9036355] [
PMID] [
]
26. [26] Safari, L., Minaei, S. H., "A Low-Voltage Low-Power Resistor-Based Current Mirror and Its Applications", Journal of Circuits, Systems, and Computers, Vol. 26, No. 11, 1750180, 2017. [
DOI:10.1142/S0218126617501808]
27. [27] Chunfeng, B., Xingyue, S., Donghai, Q., Heming, Z., "A Compact Low Voltage CMOS Current Mirror with High Output Resistance", International Conference on IC Design and Technology (ICICDT), pp. 1-3, 2019. [
DOI:10.1109/ICICDT.2019.8790877]