Volume 16, Issue 4 (JIAEEE Vol.16 No.4 2019)                   Journal of Iranian Association of Electrical and Electronics Engineers 2019, 16(4): 59-68 | Back to browse issues page

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shamsi A. Design of Reconfigurable continuous-time quadrature delta sigma modulator for multi mode LOW-IF receivers. Journal of Iranian Association of Electrical and Electronics Engineers. 2019; 16 (4) :59-68
URL: http://jiaeee.com/article-1-512-en.html
Islamic Republic of Iran Air Force
Abstract:   (838 Views)
In this paper, design and implementation of a multi-standard quadrature delta-sigma modulator (QDSM) with a new structure is presented.  This third order, FF, continuous time (CT), low pass (LP) QDSM is designed to supported the WLAN/WCDMA/GSM standards in low-IF receivers. The modulator is operates at single-bit real state in GSM mode and -to achieve the required bandwidth and SNR- multi-bit quadrature state in WLAN/WCDMA modes. To remove the DACs errors between I and Q paths, the DACs are designed to complex. Implemented in 180-nm CMOS, the modulator achieves 54/75.9/81.63 dB SNR and 1.63/0.6/0.824 (pj/s Walden FoM) (131.06/163.35/156.24 dB Schreier FoM) FOM for WLAN/WCDMA/GSM operating modes respectively.
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Type of Article: Research | Subject: Electronic
Received: 2018/02/18 | Accepted: 2019/04/10 | Published: 2019/12/27

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