Showing 4 results for Silicon-on-Insulator
Zahra Sepehri, Dr. Arash Daghighi,
Volume 16, Issue 2 (7-2019)
Abstract
In this paper, for the first time, an analytical equation for threshold voltage computations in silicon-on-diamond MOSFET with an additional insulation layer is presented; In this structure, the first insulating layer is diamond which covered the silicon substrate and second insulating layer is SiO2 which is on the diamond and it is limited to the source and drain on both sides. Analytical solution was used to determine the threshold voltage by computations of capacitors in buried insulators. Simulation and Analytical results of threshold voltage in silicon-on-diamond and silicon-on-insulator with the same dimensions and channel length were compared. Theeffect of device parameters like gate oxide thickness, silicon body thickness, length and thickness of oxide on threshold voltage of the silicon-on-diamond MOSFET were investigated and the analytical results were compared against device simulation findings.
Dr. Arash Daghighi, Zahra Hoseini,
Volume 18, Issue 1 (3-2021)
Abstract
In this paper, for the first time, the effect of the substrate doping of 22nm double-insulating UTBB silicon-on-insulator device on the switching performance and turn-on delay of the transistor is investigated. In UTBB devices, the substrate voltage is varied from positive to zero then negative voltages to trade-off transistor speed against the leakage current. Various circuit design procedures are followed to accomplish dynamic frequency-voltage scaling (DVFS). The switching delay from positive to negative substrate voltages are often considered negligible in comparison with typical 1 mS delay of the switching circuit itself. We show that the transistor switching delay is completely comparable with that of the switching circuit at the substrate doping of 1015 cm-3. Indeed, at this doping, the transistor delay is 1 mS and as the substrate doping increases to 1018 cm-3, the delay reduces to 0.03 nS. Therefore, the substrate doping directly influences the switching delay and output voltage settling time of the transistor and if ignored, will result in increased noise and degraded jitter performance.
Afshin Dadkhah, Dr. Arash Daghighi,
Volume 21, Issue 1 (3-2024)
Abstract
In this paper, for the first time, a capacitive model near threshold voltage of Ultra-Thin-Body (UTB) Double-Insulating (DI) Silicon-on-Diamond (SOD) MOSFET is extracted. The model is applicable in computations of front- and back-gate threshold voltage of 22 nm UTB DI SOD MOSFET for low drain voltages. The transistor has a second insulating layer on top of first insulating layer of conventional SOD MOSFET which partially covers the diamond layer. The device simulation results of the front- and back-gate threshold voltages and the extracted model threshold voltages in terms of gate oxide thickness, silicon film layer thickness, first and second insulating layer thicknesses are compared. The comparison with the model computed results and the device simulation outcomes are promising. The model physical findings present insight on the device parameters that directly influence the threshold voltages.
Mr Afshin Dadkhah, Arash Daghighi, Vahid Hatami, Erfan Mohammadi,
Volume 22, Issue 1 (12-2024)
Abstract
In this paper, a comprehensive investigation and simulation of the source/drain (S/D) resistance (Rsd) in 22 nm channel length double-insulating (DI) silicon-on-diamond (SOD) metal-oxide-semiconductor field-effect transistors (MOSFETs) is presented. For the first time, the effect of the S/D ion implantation region with different dimensions on Rsd is thoroughly investigated and simulated. Simulation results demonstrate that Rsd is significantly affected by the dimensions and type of the S/D ion implantation region. Optimizing the dimensions and type of the S/D region can reduce Rsd by up to 5 times. This study reveals that employing a properly designed S/D region can considerably reduce Rsd in 22 nm channel length DI-SOD MOSFETs. This can lead to improved performance and efficiency of these transistors in various electronic applications.
