Volume 16, Issue 4 (JIAEEE Vol.16 No.4 2019)                   Journal of Iranian Association of Electrical and Electronics Engineers 2019, 16(4): 79-87 | Back to browse issues page

XML Persian Abstract Print


Download citation:
BibTeX | RIS | EndNote | Medlars | ProCite | Reference Manager | RefWorks
Send citation to:

Mesgarof M H, Golmakani A. CMOS LNA with Improved Linearity Using Modified Derivative Superposition. Journal of Iranian Association of Electrical and Electronics Engineers. 2019; 16 (4) :79-87
URL: http://jiaeee.com/article-1-1046-en.html
Faculty of Electrical Engineering, Sadjad University of Technology
Abstract:   (295 Views)
An improvement in linearity of LNA amplifiers is achieved in proposed paper using auxiliary path, paralleled with the main amplifier. Moreover a cascode structure is employed to reach better amplifier parameter. Phase and amplitude are set through the second path and additional inductances in this transistor Source. Consequently non-linearity coefficient is controlled which leads to minimize the overall non-linearity coefficient. An investigation is also conducted on second-order non linearity coefficient which directly influences on IIP3. Power analyses can be used for it buta volterra analysis is applied for more accuracy and better nonlinearity modeling. DS method which is proposed in this paper can be added to various amplifier circuits since it parallels with the main circuit. Noise figure is controlled since the gates of transistors are not connected together directly. In this case we have reached an appropriate linearity which was anticipated the simulation results show a gain of 18dB, a noise figure of 2.43dB, and an IIP3 of 7.5dBm. All simulations are carried out using in 0.18 µm TSMC-RF technology.
Full-Text [PDF 713 kb]   (81 Downloads)    
Type of Article: Research | Subject: Communication
Received: 2019/12/27 | Accepted: 2019/12/27 | Published: 2019/12/27

Add your comments about this article : Your username or Email:
CAPTCHA

Send email to the article author


© 2020 All Rights Reserved | Journal of Iranian Association of Electrical and Electronics Engineers

Designed & Developed by : Yektaweb