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In this paper, a low power 2×3 matrix distributed amplifier (DA) with tapper transmission lines is introduced in 180 nm CMOS technology. The matrix structure is used to provide the mechanisms of multiplication and additive of the current for increasing the gain and reducing the power consumption. In the input stage, a controllable cascade gain cell is used to expand the bandwidth and remove to need the additional capacitors in the input gate and central transmission lines. Moreover, the terminating resistor of the input gate transmission line is replaced with an RL network. The proposed distributed amplifier is designed and simulated using TSMC 0.18 µm CMOS technology in Cadence Spectre-RF over the frequency of 1-30 GHz. Operated at 1 V, the proposed DA consumes 25.16 mW. Simulation results show that the proposed DA achieves a direct power gain (S21) of 12±1 dB with an average NF of 5.75 dB and average IIP3 of -6.11 over the 1–24 GHz band of interest. The input and output return losses are also more than 10 dB.

Keywords: Matrix distributed amplifier, Tapered transmission line, Low power, Ultra-wideband

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