Volume 19, Issue 2 (JIAEEE Vol.19 No.2 2022)
Journal of Iranian Association of Electrical and Electronics Engineers 2022, 19(2): 31-37 |
Back to browse issues page
Download citation:
BibTeX | RIS | EndNote | Medlars | ProCite | Reference Manager | RefWorks
Send citation to:
BibTeX | RIS | EndNote | Medlars | ProCite | Reference Manager | RefWorks
Send citation to:
Horri A. Design of New Ternary Inverter Gate Based on the Nanowire Transistor. Journal of Iranian Association of Electrical and Electronics Engineers 2022; 19 (2) :31-37
URL: http://jiaeee.com/article-1-1138-en.html
URL: http://jiaeee.com/article-1-1138-en.html
Department of Electrical Engineering, Arak Branch, Islamic Azad University
Abstract: (1030 Views)
In this paper by using a nanowire transistor, a new ternary inverter gate is designed. The core of this design, is a nanowire transistor with a (7nm×7nm) cross-sectional area surrounded by silicon dioxide and there are three separated gates on that oxide. By using this design, all three parts of ternary inverter include standard ternary inverter (STI), negative ternary inverter(NTI), and positive ternary inverter (PTI) are implemented by one circuit and without hardware change. The type of inverter function can be specified by the control gate voltage level. A simulation method is based on solving self-consistent Schrodinger-Poisson equations. By using this method, static power and noise margins have been calculated. The simulation results indicate that the noise margins have improved a lot compared to previous designs, but the static power remains the same.
Type of Article: Research |
Subject:
Electronic
Received: 2020/06/4 | Accepted: 2021/01/10 | Published: 2022/06/24
Received: 2020/06/4 | Accepted: 2021/01/10 | Published: 2022/06/24
Send email to the article author
| Rights and permissions | |
 |
This Journal is an open access Journal Licensed under the Creative Commons Attribution-NonCommercial 4.0 International License. (CC BY NC 4.0) |
