<?xml version="1.0" encoding="utf-8"?>
<journal>
<title>Journal of Iranian Association of Electrical and Electronics Engineers</title>
<title_fa>نشریه مهندسی برق و الکترونیک ایران</title_fa>
<short_title>Journal of Iranian Association of Electrical and Electronics Engineers</short_title>
<subject>Engineering &amp; Technology</subject>
<web_url>http://jiaeee.com</web_url>
<journal_hbi_system_id>1</journal_hbi_system_id>
<journal_hbi_system_user>admin</journal_hbi_system_user>
<journal_id_issn>2676-5810</journal_id_issn>
<journal_id_issn_online>2676-6086</journal_id_issn_online>
<journal_id_pii>8</journal_id_pii>
<journal_id_doi>10.61882/jiaeee</journal_id_doi>
<journal_id_iranmedex></journal_id_iranmedex>
<journal_id_magiran></journal_id_magiran>
<journal_id_sid>14</journal_id_sid>
<journal_id_nlai>8888</journal_id_nlai>
<journal_id_science>13</journal_id_science>
<language>fa</language>
<pubdate>
	<type>jalali</type>
	<year>1396</year>
	<month>12</month>
	<day>1</day>
</pubdate>
<pubdate>
	<type>gregorian</type>
	<year>2018</year>
	<month>3</month>
	<day>1</day>
</pubdate>
<volume>14</volume>
<number>4</number>
<publish_type>online</publish_type>
<publish_edition>1</publish_edition>
<article_type>fulltext</article_type>
<articleset>
	<article>


	<language>en</language>
	<article_id_doi></article_id_doi>
	<title_fa>Voltage Stability Constrained OPF Using A Bilevel Programming Technique</title_fa>
	<title>Voltage Stability Constrained OPF Using A Bilevel Programming Technique</title>
	<subject_fa>قدرت</subject_fa>
	<subject>Power</subject>
	<content_type_fa>پژوهشي</content_type_fa>
	<content_type>Research</content_type>
	<abstract_fa>&lt;div dir=&quot;ltr&quot; style=&quot;text-align: justify;&quot;&gt;&lt;span style=&quot;font-size:10.0pt;&quot;&gt;This paper presents a voltage stability constrained optimal power flow that is expressed via a bilevel programming framework. The inner objective function is dedicated for maximizing voltage stability margin while the outer objective function is focused on minimization of total production cost of thermal units. The original two stage problem is converted to a single level optimization problem via the KKT optimality conditions. Here to assure that the KKT optimality conditions are both necessary and sufficient the original inner problem is replaced with an equivalent problem with different structure. The applicability of the proposed method is demonstrated by implementing it in IEEE-30 bus test system&lt;/span&gt;.&lt;/div&gt;
</abstract_fa>
	<abstract>&lt;div style=&quot;text-align: justify;&quot;&gt;This paper presents a voltage stability constrained optimal power flow that is expressed via a bilevel programming framework. The inner objective function is dedicated for maximizing voltage stability margin while the outer objective function is focused on minimization of total production cost of thermal units. The original two stage problem is converted to a single level optimization problem via the KKT optimality conditions. Here to assure that the KKT optimality conditions are both necessary and sufficient the original inner problem is replaced with an equivalent problem with different structure. The applicability of the proposed method is demonstrated by implementing it in IEEE-30 bus test system.&lt;/div&gt;
</abstract>
	<keyword_fa>Voltage Stability, Optimal Power Flow, Bilevel Optimization, Complementary conditions, Convexity.

</keyword_fa>
	<keyword>Voltage Stability, Optimal Power Flow, Bilevel Optimization, Complementary conditions, Convexity.

</keyword>
	<start_page>103</start_page>
	<end_page>109</end_page>
	<web_url>http://jiaeee.com/browse.php?a_code=A-10-1-256&amp;slc_lang=en&amp;sid=1</web_url>


<author_list>
	<author>
	<first_name>Turaj </first_name>
	<middle_name></middle_name>
	<last_name>Amraee</last_name>
	<suffix></suffix>
	<first_name_fa>Turaj </first_name_fa>
	<middle_name_fa></middle_name_fa>
	<last_name_fa>Amraee</last_name_fa>
	<suffix_fa></suffix_fa>
	<email>amraee@kntu.ac.ir</email>
	<code>10031947532846001855</code>
	<orcid>10031947532846001855</orcid>
	<coreauthor>Yes
</coreauthor>
	<affiliation></affiliation>
	<affiliation_fa>Associate Professor, Department of Electrical Engineering, K.N. Toosi University of Technology, Tehran, Iran </affiliation_fa>
	 </author>


	<author>
	<first_name>Alireza</first_name>
	<middle_name></middle_name>
	<last_name> Soroudi</last_name>
	<suffix></suffix>
	<first_name_fa>Alireza</first_name_fa>
	<middle_name_fa></middle_name_fa>
	<last_name_fa> Soroudi</last_name_fa>
	<suffix_fa></suffix_fa>
	<email>Alireza.soroudi@ucd.ie</email>
	<code>10031947532846001856</code>
	<orcid>10031947532846001856</orcid>
	<coreauthor>No</coreauthor>
	<affiliation></affiliation>
	<affiliation_fa>SFI Industry Fellow, Department of Electrical Engineering, University College Dublin, Dublin, Ireland </affiliation_fa>
	 </author>


</author_list>


	</article>
</articleset>
</journal>
