RT - Journal Article T1 - Design of Reconfigurable continuous-time quadrature delta sigma modulator for multi mode LOW-IF receivers JF - jiaeee YR - 2019 JO - jiaeee VO - 16 IS - 4 UR - http://jiaeee.com/article-1-512-en.html SP - 59 EP - 68 K1 - quadrature delta-sigma modulator K1 - multi-standard K1 - WLAN/WCDMA/GSM K1 - LOW-IF receiver AB - In this paper, design and implementation of a multi-standard quadrature delta-sigma modulator (QDSM) with a new structure is presented. This third order, FF, continuous time (CT), low pass (LP) QDSM is designed to supported the WLAN/WCDMA/GSM standards in low-IF receivers. The modulator is operates at single-bit real state in GSM mode and -to achieve the required bandwidth and SNR- multi-bit quadrature state in WLAN/WCDMA modes. To remove the DACs errors between I and Q paths, the DACs are designed to complex. Implemented in 180-nm CMOS, the modulator achieves 54/75.9/81.63 dB SNR and 1.63/0.6/0.824 (pj/s Walden FoM) (131.06/163.35/156.24 dB Schreier FoM) FOM for WLAN/WCDMA/GSM operating modes respectively. LA eng UL http://jiaeee.com/article-1-512-en.html M3 ER -