%0 Journal Article %A Amiri, P. %A Hedayatipour, A. %A Aslanzadeh, S. %T Sub 1-V, 15ppm/Micro implantable voltage reference design using native transistor %J Journal of Iranian Association of Electrical and Electronics Engineers %V 14 %N 2 %U http://jiaeee.com/article-1-393-en.html %R %D 2017 %K CMOS Voltage Reference, Native Transistor, Low Power Supply, Temperature Compensation, Digital Trimming., %X Voltage references are crucial part of every circuit, providing a fixed voltage regardless of environmental parameters and device loading. Among several approaches proposed for designing voltage references, bandgap voltage references are the most common, but the bandgap voltage reference is bipolar in nature and does not show good stability when the supply voltage is small. Thus according to the increasing need for voltage references with low power consumption and low power supply, a voltage reference using threshold voltage difference between a native and a typical MOSFET transistor is proposed in this work. Using simulation for 0.18 CMOS technology, temperature coefficient and line sensitivity was measured 15ppm/°Cand0.98%/V respectively. The simulation is done to find the Sensitivity of output voltage to temperature and supply voltage in different biases. Minimum voltage supply for this work is 0.7 v and power consumption at room temperature is 700 nanowatt that make this voltage reference suitable for low power, low voltage circuits, for example nanowatt medical applications. At the end to minimize process variations a digital trimming after process is proposed, where transistors are turned on by controlling signals to have different length and width after fabrication process and different output voltages is simulated by having control switches on or off. %> http://jiaeee.com/article-1-393-en.pdf %P 107-113 %& 107 %! %9 Research %L A-10-1-233 %+ %G eng %@ 2676-5810 %[ 2017