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Gholami M, Rahimpour H. New JK-Latch and Flip-Flop in Quantum-Dot Cellular Automata Technology with Minimal Area. Journal of Iranian Association of Electrical and Electronics Engineers 2025; 22 (2) :183-187
URL: http://jiaeee.com/article-1-1776-en.html
Department of Electrical Engineering, Faculty of Engineering and Technology, University of Mazandaran
Abstract:   (736 Views)
Nowadays, with the increasing development of science and technology and considering the limitations of the technologies used in the electronics and computer industries, the need for emerging technologies is more apparent than ever. One of these emerging technologies that has been welcomed by researchers is the quantum dot cellular automata technology. Therefore, in this article, new structures for JK type latches and flip-flops, which are an important block in the logic unit and processors, will be presented. In part of the proposed JK latch block diagram, a multiplexer is used instead of logic gates, which leads to a structure that has favorable conditions compared to existing designs in terms of cell number, area, and delay. The simulation results indicate the use of 48 quantum cells, an occupied area of ​​0.044µm2 and a delay of one clock cycle, which seems appropriate compared to previous designs. The simulations of the proposed structures in the quantum dot cellular automata technology have been performed by the QCADesigner software.
 
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Type of Article: Research | Subject: Electronic
Received: 2024/12/9 | Accepted: 2025/03/1 | Published: 2025/08/15

References
1. [1] Gholami M, Valipour P, Alamdar H. One-bit Full Adder with Low Delay and Low Cell Count in the Emerging Technology of Quantum-Dot Cellular Automata. Journal of Iranian Association of Electrical and Electronics Engineers 2024; 21 (1) :11-16 [DOI:10.61186/jiaeee.21.1.11]
2. [2] Binaei R, Gholami M. Introducing New Structures for D-Type Latch and Flip-Flop in Quantum-Dot Cellular Automata Technology and its Use in Phase-Frequency Detector, Frequency Divider and Counter Circuits. Journal of Iranian Association of Electrical and Electronics Engineers 2021; 18 (1) :71-80
3. [3] Jafarali Jassbi S, Jahanshahi Javaran F, Khademolhosseini H, Sabbagh Molahosseini A. A Defect Tolerant Design for 5-Input Majority Gate in Quantum-dot Cellular Automata. Journal of Iranian Association of Electrical and Electronics Engineers 2022; 19 (2) :39-45 [DOI:10.52547/jiaeee.19.2.39]
4. [4] Rathore NK, Singh P. Design of SRAM cell using an optimized D-latch in quantum-dot cellular automata (QCA) technology. Journal of Applied Physics. 2024 Oct 7;136(13). [DOI:10.1063/5.0226889]
5. [5] Singh R, Singh P. Reversible logic based single layer flip flops and shift registers in QCA framework for the application of nano-communication. InParadigms of smart and intelligent communication, 5G and beyond 2023 May 24 (pp. 197-219). Singapore: Springer Nature Singapore. [DOI:10.1007/978-981-99-0109-8_11]
6. [6] Banik D, Rahaman H. Quantum-dot cellular automata latches for reversible logic using wave clocking scheme. IETE Journal of Research. 2023 Jan 2;69(1):309-24. [DOI:10.1080/03772063.2020.1819886]
7. [7] Alharbi M, Edwards G, Stocker R. Novel ultra-energy-efficient reversible designs of sequential logic quantum-dot cellular automata flip-flop circuits. The Journal of Supercomputing. 2023 Jul;79(10):11530-57. [DOI:10.1007/s11227-023-05134-1]
8. [8] Amirzadeh Z, Gholami M. Asynchronous counter in QCA technology using novel D flip-flop. The European Physical Journal Plus. 2024 Apr 25;139(4):352. [DOI:10.1140/epjp/s13360-024-05141-y]
9. [9] Alghosi A, Gholami M, Ghoreishi SS, Adarang H. Novel multiplexer, latch, and shift register in QCA nanotechnology for high-speed computing systems. The European Physical Journal Plus. 2024 Mar 1;139(3):266. [DOI:10.1140/epjp/s13360-024-05060-y]
10. [10] Gholami M, Amirzadeh Z. Novel Low‐Latency T‐Latch with Minimum Number of Cells in QCA Technology. Advanced Theory and Simulations. 2023 Jan;6(1):2200686. [DOI:10.1002/adts.202200686]
11. [11] Chakrabarty R, Mahato DK, Banerjee A, Choudhuri S, Dey M, Mandal NK. A novel design of flip-flop circuits using quantum dot cellular automata (QCA). In2018 IEEE 8th Annual computing and communication workshop and conference (CCWC) 2018 Jan 8 (pp. 408-414). IEEE. [DOI:10.1109/CCWC.2018.8301775]
12. [12] Yang X, Cai L, Zhao X, Zhang N. Design and simulation of sequential circuits in quantum-dot cellular automata: falling edge-triggered flip-flop and counter study. Microelectronics Journal. 2010 Jan 1;41(1):56-63. [DOI:10.1016/j.mejo.2009.12.008]
13. [13] Lim LA, Ghazali A, Yan SC, Fat CC. Sequential circuit design using Quantum-dot Cellular Automata (QCA). In2012 IEEE International Conference on Circuits and Systems (ICCAS) 2012 Oct 3 (pp. 162-167). IEEE. [DOI:10.1109/ICCircuitsAndSystems.2012.6408320]
14. [14] Koduri Revathi J. Quantum-Dot Cellular Automata based Design of Flip-Flops and Shift Register. technology. 2020 Sep;7(09).
15. [15] Nemattabar S, Mosleh M, Haghparast M, Kheyrandish M. Advancing nanoscale computing: Efficient reversible ALU in quantum-dot cellular automata. Nano Communication Networks. 2024 Jul 1;40:100498. [DOI:10.1016/j.nancom.2024.100498]
16. [16] Rathore NK, Singh P. Design of SRAM cell using an optimized D-latch in quantum-dot cellular automata (QCA) technology. Journal of Applied Physics. 2024 Oct 7;136(13). [DOI:10.1063/5.0226889]
17. [17] Goswami M, Sharma TJ, Barua AN. A Review on Regular Clocking Scheme in Quantum dot Cellular Automata. e-Prime-Advances in Electrical Engineering, Electronics and Energy. 2024 May 10:100588. [DOI:10.1016/j.prime.2024.100588]
18. [18] Goswami M, Sharma TJ, Nath Boruah A. Simple, robust and systematic QCA clocking scheme for area-efficient nanocircuits. International Journal of Electronics Letters. 2025 Jan 18:1-9. [DOI:10.1080/21681724.2025.2453910]
19. [19] Pramanik AK, Pal J, Sen B. Analysis of fault tolerance capability of QCA circuit under regular clocking. International Journal of Electronics. 2025 Jan 15:1-23. [DOI:10.1080/00207217.2025.2450738]
20. [20] Pandey S, Singh S, Wairya S. Designing an efficient approach for JK and T flip-flop with power dissipation analysis using QCA. Int J VLSI Des Commun Syst. 2016 Jun;7(3):29-48. [DOI:10.5121/vlsic.2016.7303]
21. [21] Xiaokou Yang, Li Cai, Xiaohui Zhao, Nansheng Zhang (2010) "Design and simulation of sequential circuits in quantum dot cellular automata: falling edge-triggered flip flop and counter study", Microelectronics Journal 41, pp. 56-63. [DOI:10.1016/j.mejo.2009.12.008]
22. [22] Lee Ai Lim, Azrul Ghazali, Sarah Chan Tji Yan, Chau Chein Fat (2012) "Sequential circuit design using quantum-dot cellular automata (QCA)", IEEE Conference, Kajang, Selangor, Malaysia 978-1- 4673-3119.

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